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Experiment 12 - Frequency Response
W.T. Yeung, R.A. Cortina, and R.T. Howe
This lab will introduce the student to frequency response of circuits. The student will be introduced to dominant pole analysis. The Miller effect will also be introduced here. The relationship between gain and bandwidth will also be investigated. The student will look at gain and phase relationship of a Common Emitter with a 2-pole response. The key concepts introduced in this experiment are:
The
Miller Effect plays an important role in determining the poles of
an amplifier. Shown below is a simple example.
If there is a gain A across the capacitor C,
the current across C can be written as
So the equivalent capacitance looking into v1
is the capacitance C multiplied by (1-A). If A is sufficiently
high, that capacitance will dominate and be the cause of the
dominant pole.
1. For the Common Emitter Amplifier
below, determine the poles of the system
(
F =80
VAn=50 V). Use C
= 50 fF and C
= 1.15 pF.
2. Derive the entire transfer function (vout/vin)
that includes C
, C
and general capacitances at the input
(base-emitter), output (collector-substrate) and across the gain
block (base-collector). This will be useful in determining the
expected values for the measurements.
Note: the 90k
resistors are on-chip.
1. Construct the Self- Biasing Common Emitter found on Lab Chip 3 as shown in Fig. 3.
2. What is IBIAS and the DC voltage at VOUT?
3. Insert the following signal into vIN, as shown in Fig. 4.Let the amplitude of the small signal be 500 mV and the frequency be 100 Hz
4. Using the oscilloscope or the gain phase meter, find the gain vout/vin.
5. Now increase the frequency until the output decreases by a factor of 0.707 (-3dB). Note also the phase at this frequency. Is the phase consistent with the magnitude?
6. Make a bode plot of the gain (both magnitude and phase) and observe the slope.
At higher frequencies, the input signal will
begin to attenuate to the point that the gain-phase meter will
not be able to detect it. You can compensate by increasing the
amplitude of the signal generator. The oscilloscope is helpful in
determining if the amplitude of the input waveform needs to be
increased.
On the gain-phase meter, changing the phase
reference dial from A to -A will either give you a starting
reference of 0 or -180. Pick one and be consistent.
It is helpful to have the oscilloscope
monitoring the waveforms so you can see it at all time.
Take data at 1, 2 and 5 of each decade.
Do a frequency sweep from about 100Hz to 5MHz.
If you are using the gain-phase meter, make sure
that the settings are the correct ones and keep in mind that in
order to read the right phase, the amplitude may need to be
increased at high frequencies
7. Continue to increase the frequency and try to find the second pole. How will you know when you have found it?
8. Draw the small signal model for this amplifier. Where are the poles of this system? Where do the capacitances come from? Do your results agree?
1. Construct the Self Biasing Common Emitter found on Lab Chip 3 as shown in figure 5.
2. Repeat the above procedures to find the frequency response of this amplifier.
1. Repeat the procedures of the previous
experiment with the configuration as shown in figure 6.
2. How do the results compare?
1. Connect the 741 Op-Amp as shown below
2. Let vin be a small signal with 0 V DC bias. Adjust the amplitude until you can see it on the scope.
3. Let R1=100 k
and R2=1 k
. Determine the gain of this
amplifier as well as its -3dB frequency. Start the frequency
sweep at 100Hz or 1KHz
4. Change R1 to 10 k
and repeat the experiment.
5. What is the relationship between the gain and the bandwidth of this amplifier?
4.1 Unity gain for the 741
1. For the 741 Op-amp, what will be its unity-gain frequency? (-3dB for gain of 1).
2. How can you verify this? (You will need some knowledge of the ideal op-amp model to do this)
1. Construct the SPICE deck for the experiments previously performed in section 3. You will see that the poles don't agree exactly with the values measured. Can you think of reasons why? Hint: consider the effect of large parasitic capacitances external to the transistor, such as the board and cable capacitances.
2. Include in your SPICE deck the parasitic capacitances that you thought of in part 1 and repeat the analysis. Do the lab measurements agree with the SPICE result?